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HA12220F
CD-ROM Drive Head Amplifier IC
ADE-207-230 (Z) Target Specification 1st. Edition April 1997 Functions
* RF amplifier (Built-in equalizer changing circuit) * Focus error amplifier (fc = 60kHz Typ) * Tracking error amplifier (Built-in cut-off frequency changing circuit fc = 30kHz, 60kHz, 100kHz, 200kHz Typ) * FOK detection circuit (Built-in Vth changing circuit) * Mirror detection circuit * Defect detection circuit * APC amplifier * RFAGC amplifier
Features
* Built-in variable resistors (+14 to -16% 2% steps) for adjusting tracking error EF balance * Built-in variable resistors (-8 to +8dB 4dB steps) for rough adjusting tracking gain * Built-in variable resistors (-8 to +8dB 4dB steps) for rough adjusting focus gain * Built-in focus offset insertion circuit (-0.7 to +0.7V in 0.1V steps) * RF amplifier frequency characteristics 30MHz (-3dB) in case of peaking off * High-speed access support (The mirror circuit internal time constant can be switched between normal, 4x and 8x modes.) * Support for CD-RW playback * Few external components * Available to set the stand-by mode * FP-28TB package
HA12220F
Block Diagram
HD49250 28 RF1 27 VCC BIAS RF2 1 + - EQ - + MIRH 19 RFS - + FSA FOK + - MIRR 18 HD49250 0.033 VCB 26 BYPS 25 VCF GND 24 RFC + + - FVR2 FVR Offset FA2 + - TVR2 IIL TR2 5 + - TR2 TVR Gain=8dB Typ XLT 16 HD49250 BUF GND + + - TE TLPF FE 9 0.1 10 1 23 AGCF 0.1 22 AGCO 21 DFH DEFECT DFT 20 HD49250 0.015
AGC Gain changing
RF3 2 RF4 3
MIRR
GND
FE
+ -
FA
FOK 17 HD49250
TR1 4
+ -
TR1 TVR
+ -
TA
BAL
MD 6 APC
DATA 15 HD49250
Interface
LD 7
+ -
TE 8
CI 10 -COM ADC
CO 11
VC 12
CLK XRST 13 14
HD49250 HD49250
+ -COM 100 DAC
-COM HD49250
Rev.1, Apr. 1997, page 2 of 20
GND
- +
Gain=12dB Typ
- +
HA12220F
Pin Description and Equivalent Circuit
Pin No. 1 Pin Name RF2
28
12k 120k 160k 12k 120k 160k 12k 120k 160k 12k 120k 160k
Equivalent Circuit
4k
Function RF FE FSA amplifier input2
5p
600k
1
10p 160k 160k
2
3
10p
2 3 28 4
RF3 RF4 RF1 TR1
4k 1.2p 80k 40k 32k 11.4k
RF FE FSA amplifier input3 RF FE FSA amplifier input4 RF FE FSA amplifier input1 TR1 amplifier input
5
TR2
4k 1.2p 80k 40k 32k 11.4k
TR2 amplifier input
6
MD
4k
APC amplifier input
7
LD
1k 150k
APC amplifier output
8
TE
Tracking error signal output
40k
9
FE
Focus error signal output
Rev.1, Apr. 1997, page 3 of 20
HA12220F
Pin Description and Equivalent Circuit (cont)
Pin No. 10 11 Pin Name CI CO Equivalent Circuit
2.5k
Function FSA amplifier output monitor Setting FOK reference voltage
10k
12
VC
20k
Reference voltage output
13
XRST
4k
Reset input
14 15 16 17
CLK DATA XLT FOK
VCC 20k
Serial data synchronous clock input Serial data input Serial data latch input FOK detection signal output
18
MIRR
VCC 10k
Mirror detection signal output
19
MIRH
Mirror envelope hold signal output
100k
20
DFT
VCC 20k
Defect detection signal output
Rev.1, Apr. 1997, page 4 of 20
HA12220F
Pin Description and Equivalent Circuit (cont)
Pin No. 21 Pin Name DFH Equivalent Circuit Function Defect envelope hold signal output
22
AGCO
AGC amplifier output
5k
5k
23
AGCF
100k
4k
Capacitor connection for AGC
24
RFC
2k
4k
Capacitor connection for AGC
25
VCF
VCC 40k 4k
Capacitor connection for reference voltage ripple filter
40k GND
26
BYPS
VCC 20k
Capacitor connection for ripple filter
27
VCC
--
VCC
Rev.1, Apr. 1997, page 5 of 20
HA12220F
Operation
Control by Serial Data The IC's internal switches can be operated by sending control data from the HD49250. The signal timing is shown in figure 1, and the control commands are listed in table 1 and 2.
Pin 15 DATA T1 Pin 14 CLK
0
1 T2
2
3
4
5
6
7
T3 Pin 16 XLT
T4
Item Clock frequency Clock pulse width Delay time Latch pulse width
Symbol Min fCLK T1, T2 T3 T4 -- 0.96 1 2
Typ -- -- -- --
Max 520 -- -- --
Unit kHz s s s
Figure 1 Timing Diagram for Serial Data Control Signals from the HD49250 are input at pins 14 to 16. Pin13 is connected to the microcomputer. A low input at the XRST pin resets the IC. Normally this pin should be kept high. The serial data from the HD49250 switches the following settings. 1. Tracking error EF balance 2. Focus offset 3. Tracking gain, Focus gain 4. FOK Vth 5. Mirror circuit, defect circuit normal speed / 4x speed / 8x speed mode 6. Tracking error cut-off frequency 7. APC amplifier ON/OFF 8. RF equalizer 9. Stand-by mode (cleared by setting XRST on)
Rev.1, Apr. 1997, page 6 of 20
HA12220F
XLT 16 IIL HD49250
DATA 15 HD49250 Interface
XRST CLK 13 14
-COM HD49250
Figure 2 Serial Data Control
Rev.1, Apr. 1997, page 7 of 20
HA12220F
Table 1 Serial Data Control Command 1
DATA D3 D3 0 0 0 1 1 D3 1 1 1 1 0 0 0 0 0 0 0 1 1 1 1 D2 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D2 0 1 1 0 1 D2 1 1 0 0 1 1 0 0 0 1 1 0 0 1 1 D1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Note D2 D1 0 1 0 1 0 D1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 BAL 336k 344k 352k 360k 368k 376k 384k 392k 400k 408k 416k 424k 432k 440k 448k 456k D1 Gain (dB) 0 -4 -8 +7.9 +4.3 Offset (V) +0.7 +0.6 +0.5 +0.4 +0.3 +0.2 +0.1 0 -0.1 -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 Ratio -16% -14% -12% -10% -8% -6% -4% -2% 0% +2% +4% +6% +8% +10% +12% +14% 0 D0 0
D7D6D5 Focus error gain CD-RW 000
D4 CD-RW *1
Focus error gain
Focus error offset
001
D4 1
0
Variable resistor BAL for tracking error EF balance
010
D4 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
D3 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1
0
Note: 1. Both tracking error and focus error gains are increased by 12dB. The RFAGC block gain is also increased by 12dB.
Rev.1, Apr. 1997, page 8 of 20
HA12220F
Table 2 Serial Data Control Command 2
DATA D3 D3 0 0 0 1 1 Tracking error filter Mirror Defect 101 D2 0 1 1 0 1 Note D2 D1 0 1 0 1 0 D1 Gain (dB) 0 -4 -8 +7.9 +4.3 0 D0 0
D7D6D5 Tracking error gain 100
D4 --
Tracking error gain
Mirror, Defect *1 Mode D3 D2 Normal 00 Tracking error filter 4x 01 8x 11 D4 D1 1 1 30kHz 0 1 60kHz 1 0 100kHz 0 0 200kHz FOK Vth Vth D4 D3 -12dB 11 -6dB 01 0dB 00 Prohibit 10 SC4 SC3 Stand-by ON APC ON
APC ON FOK Vth Stand-by
110
0 Stand-by mode is cleared by setting XRST on.
RFEQ
111
SC2
SC1
0
*2
Note: 1. Switches the mirror circuit and the defect circuit internal time constants at the same time. Don't use D3 = "1", D2 = "0" mode. 2. The switch name surrouded by circle means that the switch turns on when the corresponding bit is "1". This switch changes the value of the RF peaking capacitor. In case of peaking off all switches must be set off.
Rev.1, Apr. 1997, page 9 of 20
HA12220F
RF Amplifiers The output from PDIC is summed by RFS amplifier. Figure 4 shows the equivalent circuit for the EQ block in figure 3. The peaking characteristics can be changed with 4-bit data from the HD49250. On resistance of SC1 to SC4 are 600 Typ.
28 1 2 3
RF1 RF2 RF3 RF4
12k 12k 12k 12k EQ - + to AGC
RFS
Figure 3 RFS Amplifier
4p SC3 SC2
8p SC1
16p SC4 0.3p
1.58k 4k 4k
Figure 4 RFS Amplifier Equalizer Equivalent Circuit The RFS amplifier output is input to the AGC amplifier internally in the IC. Pin 24 is used to connect the capacitor that sets cut-off frequency of high-pass filter between the RFS amplifier and the AGC amplifier. The cut-off frequency will typically be 80Hz with the external constants shown in figure 5. The RF signal is rectified by an internal resistor and an external capacitor connected to pin 23. The pins 28, 1, 2, and 3 expect an input level of about 0.1Vpp. The AGC amplifier output (pin 22) will have an amplitude of 1.2Vpp Typ. When CD-RW mode is set by 1-bit data from the HD49250, the AGC amplifier gain is increased by 12dB. This allows the IC to output a 1.2Vpp Typ amplitude even during CD-RW playback.
to HD49250 22 AGCF AGCO to DEFECT MIRR
1 23
0.1
24 RFC
AGC Gain changing from RFS
Rev.1, Apr. 1997, page 10 of 20
+
Figure 5 AGC Amplifier
HA12220F
FOK Detection Circuit This detector is a comparator that generates the FOK signal. FOK is one of the signals that activate the focus servo. The FSA amplifier (fc = 53kHz Typ) summes the output from the PDIC. When this output signal becomes lower than the reference voltage by Vth, pin 17 goes high. This Vth can be set by 2-bit data from the HD49250. Vth is set to 0.8V (0dB) after a reset. Using -com ADC & DAC the voltage of pin 11 had better be set the same voltage as the voltage of pin 10 before focus searching in order to reduce the effect of DC offset voltage at FSA amplifier output.
BUF - + CO
5p 600k 28 1 2 3 RF1 RF2 RF3 RF4 120k 120k 120k 120k - +
11
-COM DAC
FSA
FOK + FOK 17 - CI -COM ADC
10
Figure 6 FOK Detection APC This circuit is for the Psub laser diode. This circuit is turned on or off by 1-bit data from the HD49250.
MD 6 APC 1k LD 7
- +
Figure 7 APC
Rev.1, Apr. 1997, page 11 of 20
HA12220F
Focus Error Amplifiers The FE amplifier adds and subtracts the output from the PDIC. FVR2 is a variable resistor used to increase the gain by 12dB in CD-RW mode. This variable resistor is set by 1-bit data from the HD49250. FVR is a variable resistor that changes the focus error gain over the range -8 to +8dB in 4dB steps. This variable resistor is set by 3-bit data from the HD49250. An offset of between -0.7 and 0.7V (in 0.1V steps) is inserted into the focus error signal. This is set by 4bit data from the HD49250. The FE output cut-off frequency (fc) is 60kHz Typ.
10p 28 1 2 3 RF1 160k RF2 160k RF3 RF4 160k 160k 10p 160k - + + - FVR2 160k 160k 10p Offset FVR FA2 Gain=12dB Typ + - FA
FE
9 FE
Figure 8 Focus Error Amplifiers Defect Detection Circuit When a scratched disc is played, the EFM RF signal has the shape shown in figure 10 (a). The defect detection circuit detects the drop-out area of this signal.
0.015 21 DFH from AGC DEFECT DFT MIRH MIRR MIRR 20 19 0.033 18 HD49250 HD49250
Figure 9 Mirror Detection, Defect Detection
;;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;;;
(a) Pin 22
(b) Pin 20
Figure 10 Defect Detection Waveform
Rev.1, Apr. 1997, page 12 of 20
HA12220F
Mirror Detection Circuit (MIRR) As the pick-up travels across tracks, the EFM RF signal varies as in figure 11 (a). The mirror detection circuit detects the mirror region from this signal. The external capacitor on pin 19 integrates the track-crossing frequency component. The internal time constant of the mirror detection circuit can be set for normal, 4x, or 8x speed by 2-bit data from the HD49250, to raise the trackable range of track-crossing frequencies. The defect circuit internal time constant is also switched at the same time.
;;;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;;;;
(a) Pin 22
(b) Pin 18
Figure 11 Mirror Detection Waveform Tracking Error Amplifiers The sub-beam output of PDIC is passed through a resistor and input at pins 4 and 5. External resistances of pins 4 and 5 should be set according to the pick-up so that the traverse signal at pin 8 is about 2Vpp Typ. After a reset, the initial value of the feedback resistance BAL of TR1 amplifier is 400k, the same as the feedback resistance of TR2 amplifier. BAL has a variable resistance value that is changed by 4-bit data from the HD49250. The variability range here is from -16 to +14% in 2% steps. This resistance can be varied to adjust the EF balance of the tracking error. TE amplifier generates the tracking error signal. TVR is a resistor that changes the tracking gain from -8 to +8dB in 4dB steps. This is set by 3-bit data from the HD49250. TVR2 is a variable resistor used to increase the gain by 12dB in CD-RW mode. This variable resistor is set by 1-bit data from the HD49250. TLPF switches the tracking error cut-off frequency. The TE output cut-off frequency is set to either 30, 60, 100, or 200kHz (Typ) by 2-bit data from the HD49250.
TR1 4
+ TR1 - BAL 1.2p + TR2 - 400k 1.2p
TVR
+ -
TE TLPF + - TVR2
+ -
TA
TR2 5
TVR
Gain=8dB Typ 8 TE
Figure 12 Tracking Error Amplifiers
Rev.1, Apr. 1997, page 13 of 20
HA12220F
Bias, Reference Voltage Pin 26 is for a bypass capacitor to eliminate noise from the IC's internal bias circuits. Connect a capacitor to pin 25 to remove the ripple component from the reference voltage. The IC's internal reference voltage is connected internally.
27 VCC BIAS
26 BYPS 40k
25 VCF 40k + - 12
Figure 13 Bias, Reference Voltage
Rev.1, Apr. 1997, page 14 of 20
+
0.1
10 GND
VCB
HA12220F
Absolute Maximum Rating (Ta=25C)
Item Power supply voltage Power dissipation Operating temperature Storage temperature Symbol VCC PT Topr Tstg Rating 6 400 -20 to +75 -55 to +125 Unit V mW C C
Note: Recommended operating power supply voltage : 5V 0.5V
Rev.1, Apr. 1997, page 15 of 20
HA12220F
Electrical Characteristics (Ta = 25C, VCC = 5V)
Item Quiescent current 1 Quiescent current 2 Reference voltage Focus error amp. Offset voltage *
1
Symbol ICC1 ICC2 VC VFE VFEH1 VFEL1 VFEH2 VFEL2 GVFE1 GVFE2 VTE VTEH1 VTEL1 VTEH2 VTEL2 GVTE1 GVTE2 VFOK
Min -- -- 2.3 - 100 4.2 -- 3.8 -- 16.0 16.0 -65 4.2 -- 3.8 -- 5.0 5.0 110
Typ 20 0.6 2.5 0 4.5 0.5 4.1 0.9 18.0 18.0 0 4.5 0.5 4.1 0.9 8.0 8.0 160
Max 32 1.0 2.7 100 -- 0.8 -- 1.2 20.0 20.0 65 -- 0.8 -- 1.2 11.0 11.0 210
Unit mA mA V mV V V V V dB dB mV V V V V dB dB mV
Test Conditions No signal Stand-by mode I12 4mA
Application Terminal 27
12 9
Max output voltage H 1 Max output voltage L 1 Max output voltage H 2 Max output voltage L 2 Voltage gain 1 Voltage gain 2 Tracking error amp. Offset voltage *1 Max output voltage H 1 Max output voltage L 1 Max output voltage H 2 Max output voltage L 2 Voltage gain 1 Voltage gain 2 FOK FOK Vth
S2, S3, S51, S9a V51 = 4V S1, S28, S51, S9a V51 = 4V S2, S3, S51, S9b V51 = 4V S1, S28, S51, S9b V51 = 4V S2, S3, S50 V9/VIN50 S1, S28, S50 V9/VIN50 8 S4, S51, S8a V51 = 4V S5, S51, S8a V51 = 4V S4, S51, S8b V51 = 4V S5, S51, S8b V51 = 4V S4, S50 V8/VIN50 S5, S50 V8/VIN50 S28, S51 when V17 4V Min (V51 - V12) *2 17
"H" output voltage "L" output voltage
VFKH VFKL
4.7 --
-- --
-- 0.4
V V
Note:
1. All offset voltages are values referring to VC (pin 12) at reset. 2. V11 = setting the same voltage as the voltage of pin 10 at no signal.
Rev.1, Apr. 1997, page 16 of 20
HA12220F
Electrical Characteristics (Ta = 25C, VCC = 5V) (cont)
Item Defect Max operation frequency Min operation frequency "H" output voltage "L" output voltage Mirror Max operation frequency "H" output voltage "L" output voltage CLK DATA XLT XRST "H" input voltage "L" input voltage APC RFAGC APC voltage Output voltage 1 Output voltage 2 Output voltage 3 Output voltage 4 Frequency characteristics 1 Frequency characteristics 2 Frequency characteristics 3 Frequency characteristics 4 Symbol FDH FDL VDFH VDFL FMIR VMIH VMIL VPH VPL VAPC VAGC1 VAGC2 VAGC3 VAGC4 FAGC1 FAGC2 FAGC3 FAGC4 Min 2 -- 4.7 -- 200 4.7 -- 4.0 -- 0.09 0.8 0.8 0.8 0.8 -- -- -- -- Typ -- -- -- -- -- -- -- -- -- 0.16 1.2 1.2 1.2 1.2 30 30 30 30 Max -- 1 -- 0.4 -- -- 0.4 -- 1.0 0.23 1.6 1.6 1.6 1.6 -- -- -- -- Unit kHz kHz V V kHz V V V V V Vp-p Vp-p Vp-p Vp-p MHz MHz MHz MHz S28, S50, f = 200kHz 0.4Vpp 6dB input S1, S50, f = 200kHz 0.4Vpp 6dB input S2, S50, f = 200kHz 0.4Vpp 6dB input S3, S50, f = 200kHz 0.4Vpp 6dB input S28, S50, S23 0.4Vpp input *3 S1, S50, S23 0.4Vpp input *3 S2, S50, S23 0.4Vpp input *3 S3, S50, S23 0.4Vpp input *3 6 22 13, 14, 15, 16 S28, S1, S2, S3, S50, S23 8x mode 18 Test Conditions S28, S1, S2, S3, S50, S23 Application Terminal 20
Note:
3. Setting V23 at the value of the pin 23 voltage when S28 is on, VIN50 = 0.4Vpp, and a 200kHz input. The frequency down -3dB from the output level for f = 200kHz.
Rev.1, Apr. 1997, page 17 of 20
HA12220F
Test Circuit
V23 S28 + 24 23 FVR Offset TVR2 IIL S5 5 390k + - TR2 TVR 16 BUF 15
+ -
S23 + 25 + - 1 EQ - + - + 3 FVR2 0.1 + - TE TLPF + - 9 S9a 20k S9b 2k VCC 28 27 26 0.1 1 GND 1 0.1 22
10k S22 21 0.015 10k S20 DEFECT 20
BIAS S1 VCB
AGC Gain changing
0.033 19 RFS FSA FOK + - 10k S18 MIRR 18
S2 2 S3
S51 V51
GND
FE
GND
- +
+ -
FA2 FA
S50
10k S17
+ -
VIN50
17
S4 4 390k
+ -
TR1 TVR
+ -
TA
BAL
560 6 APC
- +
2SB 561C
7 S8a S8b 2k
8
10
GND
11 V11
12 + 10
13 14
Serial data generator 2k 20k
Note: The symbol "q" of transfer switch shows OFF state.
Rev.1, Apr. 1997, page 18 of 20
HA12220F
Package Dimensions
Unit: mm
9.0 0.2
21 28 1 0.32 0.08 0.30 0.06 6
14
7 0.13
M
0.65
9.0 0.2 7.0 20 15
0.17 0.05 0.15 0.04
1.40 1.7 Max
1.0 0.575 0- 8
0.575
2.25 0.1 0.10
0.09 0.13 + 0.05 -
0.95 0.10 0.50 0.10
Hitachi Code JEDEC Code EIAJ Code Weight FP-28TB -- -- 0.19 g
Rev.1, Apr. 1997, page 19 of 20
HA12220F
Disclaimer
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi's or any third party's patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party's rights, including intellectual property rights, in connection with use of the information contained in this document. 2. Products and product specifications may be subject to change without notice. Confirm that you have received the latest product standards or specifications before final design, purchase or use. 3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However, contact Hitachi's sales office before using the product in an application that demands especially high quality and reliability or where its failure or malfunction may directly threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation, traffic, safety equipment or medical equipment for life support. 4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly for maximum rating, operating supply voltage range, heat radiation characteristics, installation conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the Hitachi product. 5. This product is not designed to be radiation resistant. 6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without written approval from Hitachi. 7. Contact Hitachi's sales office for any questions regarding this document or Hitachi semiconductor products.
Sales Offices
Hitachi, Ltd.
Semiconductor & Integrated Circuits. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Tel: Tokyo (03) 3270-2111 Fax: (03) 3270-5109
URL
NorthAmerica : http://semiconductor.hitachi.com/ Europe : http://www.hitachi-eu.com/hel/ecg Asia : http://sicapac.hitachi-asia.com Japan : http://www.hitachi.co.jp/Sicd/indx.htm For further information write to:
Hitachi Europe GmbH Electronic Components Group Dornacher Strae 3 D-85622 Feldkirchen, Munich Germany Tel: <49> (89) 9 9180-0 Fax: <49> (89) 9 29 30 00 Hitachi Europe Ltd. Electronic Components Group. Whitebrook Park Lower Cookham Road Maidenhead Berkshire SL6 8YA, United Kingdom Tel: <44> (1628) 585000 Fax: <44> (1628) 585160 Hitachi Asia Ltd. Hitachi Tower 16 Collyer Quay #20-00, Singapore 049318 Tel : <65>-538-6533/538-8577 Fax : <65>-538-6933/538-3877 URL : http://www.hitachi.com.sg Hitachi Asia Ltd. (Taipei Branch Office) 4/F, No. 167, Tun Hwa North Road, Hung-Kuo Building, Taipei (105), Taiwan Tel : <886>-(2)-2718-3666 Fax : <886>-(2)-2718-8180 Telex : 23222 HAS-TP URL : http://www.hitachi.com.tw Hitachi Asia (Hong Kong) Ltd. Group III (Electronic Components) 7/F., North Tower, World Finance Centre, Harbour City, Canton Road Tsim Sha Tsui, Kowloon, Hong Kong Tel : <852>-(2)-735-9218 Fax : <852>-(2)-730-0281 URL : http://www.hitachi.com.hk
Hitachi Semiconductor (America) Inc. 179 East Tasman Drive, San Jose,CA 95134 Tel: <1> (408) 433-1990 Fax: <1>(408) 433-0223
Copyright Hitachi, Ltd., 2000. All rights reserved. Printed in Japan. Colophon 2.0
Rev.1, Apr. 1997, page 20 of 20

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